EMI/EMC in High-Power SiC Inverters

Silicon carbide is a compelling switching technology precisely because it switches fast. That speed - the 10-50 V/ns dV/dt and multi-A/ns dI/dt that enables high switching frequency, small magnetics, and reduced filter requirements - is also the root cause of the worst electromagnetic interference challenges in modern power conversion. A SiC inverter running at 100 kHz generates significant harmonic content from the fundamental up through several hundred megahertz. It couples noise through parasitic capacitance to the chassis, through the motor cable to the load, and back through the DC bus to upstream equipment. Managing this without sacrificing the efficiency and power density advantages of SiC requires a systematic approach to EMI source identification, propagation path analysis, and filter design. This article covers that process for high-power inverter applications in the defense, aerospace, and motorsport markets where EMC compliance is not optional.

1. EMI Sources in SiC Inverters

Every switching event in an inverter generates two types of electromagnetic disturbance: conducted, which propagates along power and signal conductors, and radiated, which propagates through space as electromagnetic fields. Both originate from the same physical event - the switching node voltage and current transitioning at high speed - but they propagate by different mechanisms and require different mitigation strategies.

The primary EMI sources in a SiC half-bridge inverter are:

• Switching node voltage (dV/dt): The switching node transitions between 0 and bus voltage at 10-50 V/ns. This trapezoidal waveform contains harmonic energy at multiples of the switching frequency, with significant content extending to 100+ MHz depending on rise time. This is the dominant source of common-mode current through parasitic capacitances.
• Bus current ripple (dI/dt): The pulsed current drawn from the DC bus at each switching event generates differential-mode noise on the bus. Amplitude is determined by load current; frequency content extends from switching frequency to the ringing frequency of the commutation loop.
• Ringing at switching node: LC resonance between parasitic inductance and device output capacitance produces high-frequency ringing (10-500 MHz) superimposed on the switching transition. This is a broadband radiated source and also couples into adjacent circuits capacitively.
• Dead-time pulses: Body diode conduction during dead time creates narrow current pulses with very high dI/dt, generating broadband noise impulses at twice the switching frequency.

2. Conducted EMI: Common Mode vs Differential Mode

Conducted EMI on the DC input lines of an inverter is separated into two components based on the current path. Understanding which mode dominates determines which filter topology is effective.

Differential-mode (DM) noise flows between the positive and negative bus conductors in opposite directions. It is generated primarily by the pulsed DC bus current drawn during switching, and by the voltage ripple across the DC link. DM noise is attenuated by series inductance (common-mode chokes do not help) and shunt capacitance between positive and negative rails.

Common-mode (CM) noise flows in the same direction on both bus conductors and returns through the chassis ground. It is generated by the dV/dt of the switching node coupling through parasitic capacitances to chassis - the capacitance from the heatsink through the device thermal interface to the substrate, from the motor winding to the motor frame, and from any PCB conductor that is physically close to chassis. CM noise is attenuated by common-mode chokes (which present high impedance to equal currents) and by Y-capacitors from bus rails to chassis.

Noise Type	Current Path	Primary Source	Filter Element
Differential mode (DM)	+bus to -bus	DC bus current ripple, bus voltage ripple	Series inductors, X-capacitors
Common mode (CM)	Both conductors to chassis	Switching node dV/dt via parasitic capacitance	CM choke, Y-capacitors
Mixed mode	Asymmetric paths	Layout asymmetry, component imbalance	Both; layout correction preferred

In practice, both modes are present simultaneously, and their relative amplitudes depend on the specific circuit and layout. Characterization with a line impedance stabilization network (LISN) and a spectrum analyzer, with CM and DM separation networks, is the correct method for identifying which mode requires the most attenuation.

3. EMC Standards for Target Markets

Compliance requirements vary significantly by application market. Defense and aerospace impose the most demanding specifications; industrial and automotive follow recognizable international standards. Understanding the applicable standard before beginning filter design is essential, as the limit levels, frequency ranges, and measurement methods differ substantially.

Standard	Market	Scope	Key Frequency Range
MIL-STD-461G (CE102/RE102)	Defense	Conducted emissions on power leads; radiated emissions	10 kHz to 10 GHz
DO-160G Section 21	Aerospace (civil)	Conducted and radiated emissions for aircraft equipment	150 kHz to 152 MHz (conducted)
CISPR 25	Automotive / motorsport	Conducted and radiated emissions for vehicles	150 kHz to 2500 MHz
CISPR 11 / IEC 61000-6-4	Industrial	Radiated and conducted emissions	150 kHz to 30 MHz (conducted)
EN 55032 / FCC Part 15	Commercial electronics	Radiated and conducted	150 kHz to 30 MHz (conducted)

MIL-STD-461 CE102 limits conducted emissions from 10 kHz to 10 MHz and are typically 60-80 dBuV below the levels at which a typical SiC inverter would operate without filtering. DO-160 imposes similar attenuation requirements but the limit shapes differ. Both standards include conducted susceptibility tests (CS101, CS114) that require the converter to remain functional in the presence of injected noise - a filter that reduces emissions may also need to attenuate incoming disturbances.

4. Common-Mode Filter Design

A common-mode choke consists of two windings on a shared high-permeability toroidal core, wound such that differential-mode currents (equal and opposite) cancel in the core while common-mode currents (equal direction) add and see the full magnetizing inductance. This makes it highly effective against CM noise without affecting the DC bus current that flows differentially.

The CM inductance required for a given attenuation at frequency f is:

L_cm = 1 / (2 x pi x f x Gm), where Gm is the CM conductance of the source and load.

In practice, CM choke values for SiC inverter applications at 150 kHz to 30 MHz range are typically 1 to 10 mH. The core material determines frequency performance: ferrite (MnZn for lower frequency, NiZn for above 1 MHz) is standard. Nanocrystalline cores provide higher permeability at lower frequency but saturate at lower flux density - verify saturation with DC bias from the cable shield or ground currents in the worst case.

CM Choke Inductance	Target Attenuation	Effective Range	Core Material
100 to 500 uH	20 to 40 dB at 150 kHz	150 kHz to 1 MHz	MnZn ferrite
1 to 5 mH	40 to 60 dB at 150 kHz	150 kHz to 30 MHz	MnZn ferrite or nanocrystalline
5 to 10 mH	60 dB+ at 150 kHz	150 kHz to 10 MHz	Nanocrystalline; verify saturation

Y-capacitors from each bus rail to chassis ground provide a low-impedance return path for CM current at the inverter input, preventing CM current from propagating along the bus to upstream equipment. Typical values are 10 to 100 nF at 1200-2000V rating. The chassis connection must be a direct, low-impedance bond - a long wire from the capacitor to a chassis ground point adds series inductance that erodes high-frequency effectiveness.

5. Differential-Mode Filter Design

Differential-mode filter inductors carry the full DC bus current and must be sized accordingly for both saturation current and DC resistance. DM inductors are placed in series in the positive and negative bus conductors, combined with X-capacitors (bus-to-bus) to form LC low-pass filters.

The DM filter cutoff frequency should be set well below the switching frequency. A second-order LC filter provides 40 dB/decade attenuation above its corner frequency. For a 100 kHz switching frequency and a 40 dB attenuation target at 150 kHz:

f_corner = 150 kHz / 10^(40/40) = 15 kHz

This requires a fairly aggressive filter, and the inductor must carry full DC load current without saturating. For a 300A application, a DM inductor of 10-50 uH in a 400A-rated core is typical. Copper loss in the DM inductor is a real efficiency penalty - a 0.5 mohm DCR at 300A costs 45W of continuous loss. Conductor sizing and core geometry must balance inductance, saturation, and loss simultaneously.

X-capacitors (rated for full bus voltage plus overshoot) are typically 1 to 10 uF for high-power applications. Film capacitors are preferred over electrolytics for their lower ESR and ESL. Multiple smaller capacitors in parallel improve high-frequency performance by reducing combined ESL.

6. Motor Cable and Output dV/dt Filters

The motor cable is one of the most significant EMI propagation paths in an inverter drive system. The cable acts as a transmission line for the fast-switching voltage waveforms from the inverter output, and its distributed capacitance to the shield (and thus chassis) provides a low-impedance path for CM current at high frequencies. For cables longer than approximately 3 meters, the transmission line effect becomes significant: voltage reflections at the motor terminal can double the applied voltage above the bus level if the cable characteristic impedance does not match the motor winding impedance at switching frequencies.

Cable Length	Reflection Risk	CM Current (100 kHz, 100 pF/m)	Mitigation
Under 1 m	Negligible	Low	Standard cable, no dV/dt filter required
1 to 5 m	Moderate at fast dV/dt	Moderate	Shielded cable; consider output CM choke
5 to 20 m	Significant; motor terminal overvoltage possible	High	dV/dt filter required; shielded cable mandatory
Over 20 m	Severe; motor insulation stress	Very high	dV/dt filter plus output CM choke; verify motor insulation rating

An output dV/dt filter consists of small inductors in series with each phase output, combined with capacitors to chassis or between phases. The objective is to limit dV/dt at the motor terminal to below 1000 V/us for standard motor insulation systems, or per the motor manufacturer's specification for high-voltage or high-frequency rated motors. The filter must not significantly attenuate the fundamental output frequency while providing attenuation above the inverter switching frequency.

7. Grounding Strategy

Grounding is the most frequently misunderstood aspect of EMC in power electronics. Ground is not simply the return conductor for DC current - it is the reference plane for all voltage measurements, the return path for CM current, and the equipotential bond between chassis, housings, and system references. Poor grounding creates the very ground loops that allow CM noise to propagate.

For SiC inverters in vehicle, aerospace, and defense applications, the recommended grounding architecture is a single-point star ground at the chassis, with separate bonds for power ground (DC bus negative or midpoint), signal ground (control electronics), and chassis ground (mechanical structure). The bonding impedance between each of these grounds matters: a long, thin wire bond introduces inductance that allows high-frequency CM currents to develop voltage differences between grounds, which then appear as interference on signal circuits.

• Power ground bond: Wide copper strap, minimum 25 mm wide, direct to chassis bonding point. Under 5 mohm DC resistance and under 10 nH inductance.
• Signal ground bond: Separate short bond to same chassis point. Never route signal ground return current through power ground conductors.
• Heatsink bond: Heatsink to chassis is a CM current path and must be a low-impedance bond. Anodized aluminum provides poor electrical contact - use bare aluminum contact with conductive hardware at the bond point.
• Cable shield termination: Motor cable shield must be terminated 360 degrees at both the inverter housing and the motor frame using EMC cable glands or back-shell connectors. Pigtail connections add inductance and are ineffective above 1 MHz.

8. Shielding

A conductive enclosure attenuates radiated emissions from internal sources and provides immunity against external fields. Shielding effectiveness (SE) depends on material conductivity and permeability, enclosure geometry, and the frequency of interest. Aluminum at 1 mm thickness provides 40-60 dB of shielding above 10 MHz. Steel provides additional low-frequency magnetic shielding. At frequencies above 100 MHz, skin depth in aluminum is under 0.01 mm, so sheet thickness has diminishing returns and seam and aperture integrity dominates.

Every aperture in a shielded enclosure - ventilation holes, connectors, display windows - reduces shielding effectiveness. Honeycomb ventilation panels maintain airflow while providing 60+ dB SE by acting as a waveguide below cutoff. Connector feedthroughs require filtered connectors or feedthrough capacitors to maintain SE at the conductor penetration point. A single 10 mm hole in an otherwise perfect shield reduces SE to approximately 30 dB at frequencies above 15 GHz - a negligible concern for power electronics - but a 100 mm unsealed seam reduces SE to 30 dB at 1.5 GHz, which matters for DO-160 testing.

9. PCB Layout for EMI Reduction

A significant portion of high-frequency EMI in SiC converters originates from or propagates through the PCB. Layout choices that reduce switching loop inductance (covered in the parasitic inductance article) also reduce radiated emissions from the switching loop, since a smaller radiating area produces less radiated field for the same current amplitude.

Additional layout practices specific to EMI reduction:

• Switching node copper area minimization: The switching node is a high-dV/dt conductor that acts as an antenna. Minimize the copper area connected to the switching node on all layers. Do not use the switching node net as a fill area.
• Separate analog and digital grounds: Control circuitry, ADCs, and signal isolators should have their own ground plane area connected to power ground at a single point. Switching currents must not flow through the analog ground plane.
• Decoupling capacitor placement: All IC supply pins need local ceramic bypass capacitors within 2-3 mm. Long traces from bypass caps to supply pins allow supply rail voltage to spike during fast transients, coupling noise into IC logic.
• Gate drive routing: Gate drive traces are high-frequency signal conductors. Route them away from high-current power conductors and keep them short. Avoid running gate drive traces adjacent to the switching node or DC bus conductors.
• Thermal interface pad isolation: The device thermal pad, if connected to drain (common in SiC MOSFETs), is a high-dV/dt conductor connected to a large copper area for heat spreading. Isolate this area from the chassis with low-capacitance thermal interface material, or accept the CM current path and filter accordingly.

10. dV/dt Control Trade-offs

Slowing the switching transition is the most direct way to reduce EMI. Increasing gate resistance reduces dV/dt, which reduces both the high-frequency harmonic content and the CM current amplitude. The trade-off is increased switching losses - slower switching means longer transition times, more energy dissipated in the device during each event, and reduced efficiency.

dV/dt (V/ns)	Switching Loss (relative)	EMI Characteristic Frequency	CM Current (relative)
50	1x	~150 MHz	5x
20	1.3 to 1.6x	~60 MHz	2x
10	1.8 to 2.5x	~30 MHz	1x
5	2.5 to 4x	~15 MHz	0.5x

For most applications, an optimum exists in the 10-20 V/ns range: fast enough to keep switching losses acceptable at 50-100 kHz, slow enough that filtering requirements are not excessive. Below 10 V/ns, switching losses typically become the limiting factor on efficiency. Above 30 V/ns, filter and shielding costs often exceed the efficiency gain from faster switching.

Adaptive gate drive - varying gate resistance as a function of operating point - can optimize this trade-off at different load conditions. At light load, slower switching reduces partial-load efficiency losses and EMI simultaneously. At full load, faster switching reduces conduction and switching loss where thermal margin is tightest.

11. Pre-Compliance Testing

Full compliance testing at an accredited EMC laboratory is expensive and time-consuming. Pre-compliance testing with in-house equipment, conducted early in the design cycle, catches EMI problems before they become schedule risks. A practical pre-compliance setup for a SiC inverter program includes:

• LISN (Line Impedance Stabilization Network): Required for standardized conducted emission measurement. A 50-ohm LISN per MIL-STD-461 or CISPR is available from vendors such as Fischer Custom Communications, Tekbox, or similar. Do not attempt conducted emission measurement without a LISN.
• Spectrum analyzer: 9 kHz to at least 1 GHz for conducted emissions; 30 MHz to 6 GHz for radiated. A tracking generator is useful for antenna/filter S-parameter measurements. A near-field probe set (loop and monopole probes) allows identification of specific EMI sources on the PCB without a full anechoic chamber.
• Current probes: For measuring CM current on cables without breaking the circuit. A 100 Hz to 100 MHz current probe over the full cable bundle quantifies CM noise directly.
• High-bandwidth oscilloscope: 1 GHz minimum for SiC switching waveform characterization. Used for verifying dV/dt, identifying ringing, and time-domain correlation of EMI events with switching transitions.

Pre-compliance testing is most valuable when conducted iteratively: measure, identify the dominant frequency and mode, apply a targeted fix (choke, capacitor, layout change), measure again. This systematic approach is far more efficient than designing a comprehensive filter from the outset and hoping it passes.

12. Worked Example: Defense Inverter, MIL-STD-461G Compliance

Consider a 270V DC, 150 kW SiC inverter for a defense vehicle application, requiring compliance with MIL-STD-461G CE102 (conducted emissions, 10 kHz to 10 MHz) and RE102 (radiated emissions, 2 MHz to 18 GHz).

• Switching frequency: 80 kHz. Fundamental and harmonics appear at 80, 160, 240 kHz... with significant content to 30+ MHz depending on rise time.
• Target dV/dt: 15 V/ns as a compromise. Characteristic EMI frequency approximately 45 MHz.
• CM current source: Switching node at 270V peak with 15 V/ns through approximately 500 pF heatsink capacitance: I_cm = C x dV/dt = 500 pF x 15 V/ns = 7.5 A peak. This is the CM current that must be filtered before reaching the input bus LISN.
• CM filter: 3 mH nanocrystalline CM choke, 22 nF Y-capacitors to chassis at input. Target 60 dB attenuation at 150 kHz. Measured in pre-compliance testing and iterated.
• DM filter: 20 uH DM inductors (300A rated, low DCR), 10 uF X-capacitors. Corner frequency approximately 10 kHz. Targeted at bus ripple and switching frequency harmonic on DC bus.
• Enclosure: 2 mm aluminum welded chassis, conductive EMC gland at motor cable feedthrough, honeycomb ventilation panels at cooling air inlets. All seams gasketed with beryllium copper finger stock.
• Grounding: Single chassis bond point, 30 mm copper strap from power ground. Signal and chassis ground star at bond point. Motor cable shielded, 360-degree termination at housing backshell.
• Pre-compliance result: CE102 margin approximately 6 dB at 150 kHz (worst case) after filter optimization. RE102 comfortable margin with enclosure in place. Formal lab testing scheduled after thermal validation complete.

13. References

• MIL-STD-461G: Requirements for the Control of Electromagnetic Interference Characteristics of Subsystems and Equipment, 2015
• RTCA DO-160G: Environmental Conditions and Test Procedures for Airborne Equipment, Section 21, 2010
• Nave, M.J., "Power Line Filter Design for Switched-Mode Power Supplies," Van Nostrand Reinhold, 1991
• Ott, H.W., "Electromagnetic Compatibility Engineering," Wiley, 2009
• Heldwein, M.L. et al., "Impact of EMC Filters on the Power Density of Modern Three-Phase PWM Converters," IEEE Trans. Power Electronics, 2009
• Chen, H. et al., "Common Mode EMI Noise Modeling and Reduction Techniques for SiC-Based Motor Drive," IEEE Trans. Electromagnetic Compatibility, 2020
• Wang, S. et al., "Characterization, Evaluation, and Design of Noise Separator for Conducted EMI Noise Diagnosis," IEEE Trans. Power Electronics, 2006